32-Channel Ultra-Low-Noise Data Acquisition System
Project Overview
A structural health monitoring (SHM) systems company engaged Qmax Systems to develop a high-precision impact detection platform for aerospace and defence applications — identifying and localizing impacts on small aircraft and helicopters in real time. Qmax delivered the complete embedded system: architecture, hardware design, firmware, Linux software, mixed-signal PCB design, prototype manufacturing, and full Design Verification Testing (DVT).
The resulting 32-channel ultra-low-noise Data Acquisition (DAQ) system feeds the customer's proprietary analysis engine, which determines where the airframe was hit and supports continue/abort mission decisions.
Product Brief
The system is a 32-channel, 16-bit simultaneous-sampling data acquisition board that continuously monitors piezoelectric sensors bonded to aircraft structures. Four 8-channel simultaneous-sampling SAR ADCs capture all 32 channels in parallel at 30 KSPS per channel with 90 dB SNR, behind a precision analog front-end of anti-aliasing and low-pass filter stages.
A parallel hardware trigger path — programmable-threshold comparators with Schmitt trigger and monoshot circuits — detects impact events and instantly initiates buffered capture. A quad-core NXP i.MX6 applications processor on an industrial SODIMM System-on-Module runs Linux, drives all four ADCs over dedicated high-speed SPI ports, and streams event data to the decision engine over Gigabit Ethernet. The design is industrial temperature rated for airborne and field deployment.
Scope of Work
Qmax Systems delivered the complete embedded DAQ platform for structural health monitoring:
- System architecture definition for a 32-channel simultaneous-capture, trigger-based DAQ platform
- Mixed-signal hardware design — precision analog front-end, multi-ADC array, and processor section
- Linux driver development for high-speed multi-ADC capture and application software
- 8-layer mixed-signal PCB design with dedicated analog/digital ground and power plane strategy
- Signal integrity analysis and ultra-low-noise layout for 90 dB SNR performance
- Analog/digital grounding, isolation, and power distribution design across multiple ADCs
- Prototype manufacturing and board bring-up
- Full Design Verification Testing (DVT) including noise, SNR, and trigger characterization
Engineering Challenges
Ultra-low-noise 90 dB SNR on a dense mixed-signal board alongside a quad-core processor
8-layer stackup with dedicated analog/digital ground and power planes, precision zero-drift op-amp front-end (AD8630), and ultra-low-noise layout validated through signal integrity analysis to preserve measurement-grade fidelity
Simultaneous 32-channel capture with no inter-channel skew for impact localization
Four TI ADS8568 simultaneous-sampling SAR ADCs — one dedicated high-speed SPI port each — with software alignment and packetization ensuring phase-coherent data across all 32 channels
Sustaining 32 channels × 16-bit × 30 KSPS continuous throughput over four SPI ports
Multi-core Linux architecture dedicating all four i.MX6 CPU cores to parallel acquisition, ring buffering, and Gigabit Ethernet forwarding pipelines running in real time
Analog/digital grounding and isolation across four ADCs on a single board
8-layer PCB stackup with dedicated analog and digital ground planes, isolated power distribution, and careful return-path planning across the four-ADC array and processor section
Low-latency hardware trigger path so no impact transient is ever missed
Programmable-threshold comparator chain with Schmitt trigger and monoshot circuits, I2C DAC threshold control, and direct GPIO trigger input to the CPU for instant capture initiation
Continuous pre-trigger buffering to preserve the waveform before each impact
Trigger-based capture engine with continuous ring buffering and pre/post-trigger storage, preserving the full waveform leading up to each detected impact event
Fully utilizing all four CPU cores for real-time acquire, buffer, and forward
Dedicated per-core pipelines for SPI ADC read, data alignment, packetization, and Ethernet streaming — maximizing throughput without dropping samples during impact events
Protecting sensitive analog inputs from overvoltage while preserving signal fidelity
TVS and clamp protection network on all 32 DB37 sensor inputs, engineered to suppress transients without degrading the precision analog front-end or SNR performance
Hardware Components
4× TI ADS8568 SAR ADCs
16-bit, 8-channel simultaneous-sampling bipolar SAR ADCs providing 32 channels total at 30 KSPS per channel with dedicated SPI interfaces
NXP i.MX6 Quad-Core Applications Processor
Industrial-grade 200-pin SODIMM System-on-Module running embedded Linux for multi-ADC capture, buffering, and event streaming
AD8630 Zero-Drift Op-Amp Array
Precision anti-aliasing and low-pass filter front-end for each sensor channel, preserving ultra-low-noise performance across the full input range
Programmable-Threshold Trigger Chain
Comparators, Schmitt trigger, and monoshot circuits with I2C DAC threshold control for hardware impact-event detection and instant capture initiation
Precision Voltage Reference & Analog Power Tree
Multi-rail analog power distribution (±15 V, +5 V analog, 3.3 V digital) with precision reference for consistent ADC performance across temperature
TVS & Clamp Protection Network
Overvoltage protection on all 32 piezoelectric sensor inputs via DB37 connector, safeguarding the precision front-end in field deployment
Interfaces & Protocols
32× Analog Input Channels
DB37 connector interface for piezoelectric sensors bonded to aircraft structures — continuous monitoring with per-channel precision front-end
4× High-Speed SPI
One dedicated SPI port per ADS8568 ADC for parallel simultaneous data capture at 30 KSPS per channel
Hardware Trigger Input
CPU GPIO trigger path from the comparator chain — programmable thresholds with instant impact-event detection
Gigabit Ethernet
Low-latency streaming of captured event data to the customer's analysis and continue/abort decision engine
USB Host, USB OTG & UART-to-USB
Debug console, peripheral attachment, and field diagnostics interfaces on the i.MX6 platform
Micro SD Card
Local storage for capture data, system configuration, and field logging
Firmware & Software
Embedded Linux BSP Bring-up
Quad-core i.MX6 platform BSP configured with device tree support for four SPI ADC ports, Gigabit Ethernet, GPIO trigger, I2C DAC, USB, and SD card storage.
Custom Multi-ADC Linux Drivers
High-speed SPI drivers for four simultaneous ADS8568 capture streams with per-channel configuration, calibration, and continuous sampling at 30 KSPS.
Multi-Core Acquisition Architecture
All four CPU cores dedicated to parallel pipelines — SPI acquisition, ring buffering, data alignment, and Ethernet forwarding — sustaining real-time 32-channel throughput.
Trigger-Based Capture Engine
Continuous monitoring with pre/post-trigger ring buffering, instant capture initiation on hardware trigger events, and preservation of pre-impact waveform data.
32-Channel Data Alignment & Packetization
Simultaneous channel alignment and structured packetization for the customer's proprietary impact localization and decision engine.
Programmable Trigger Threshold Control
I2C DAC-driven threshold configuration and calibration routines for field-adjustable impact detection sensitivity.
Gigabit Ethernet Streaming Stack
Low-latency event data delivery over Gigabit Ethernet with buffering and retry logic for reliable transmission to the analysis system.
DVT Validation Software
System validation tools for SNR, noise floor, and channel-to-channel skew measurement during full Design Verification Testing.
Technical Specifications
Summary
Qmax Systems delivered a complete 32-channel ultra-low-noise data acquisition system — from architecture and mixed-signal hardware through Linux drivers, application software, 8-layer PCB design, prototypes, and full DVT. Capturing all 32 piezoelectric sensor channels simultaneously at 16-bit / 30 KSPS with 90 dB SNR, the platform gives structural health monitoring and defence customers the raw fidelity needed to detect and localize impacts on aircraft structures in real time.
The project showcases Qmax's depth in precision mixed-signal design and high-throughput embedded Linux systems — combining ultra-low-noise analog front-end engineering, multi-ADC simultaneous capture, hardware trigger paths, and multi-core real-time data pipelines into a single airborne-grade platform.